Sample Waveforms for "fifo_adc.vhd"

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Sample behavioral waveforms for design file "fifo_adc.vhd"

The following waveforms show the behavior of dcfifo megafunction for the chosen set of parameters in design "fifo_adc.vhd". The design "fifo_adc.vhd" has a depth of 1024 words of 8 bits each. The fifo is in legacy synchronous mode. The data becomes available after 'rdreq' is asserted; 'rdreq' acts as a read request.

Fig. 1 : Wave showing read and write operation.

The above waveform shows the behavior of the design under normal read and write conditions with aclr .