
Skiroc2_20101103 : (4)

 - USB interface v2.3 (Verilog)
 - Firmware version register
 - Slow Control (including Slow Control correlation test, RamFull detection & End_ReadOut detection)
   + Debug mode for control registers (1-bit shift for : Slow COntrol, Probe & SCA_Read)
 - ASIC RAM ReadOut
 - Scurve tests (16 bits, DAC0)
 - Digital Reset on Scurve and ASIC Transmit Ram
 - External ADC all channels measure
 - Automatic DAQ ( Start_Acqt, StartConvDAQb, Start_ReadOut, En_40_MHz, Clk_Gene_Ext => 5_MHz )
   + Triggers gated in autoDAQ mode (Val_Evt for internal triggers, Trig_ext for external ones)
   + Power Pulsing facility (autoDAQ_SK2.vhd)
 - Internal ADC Test Mode (using the automatic DAQ)

Skiroc2_20110404 : (5)

 - bugs correction in ASIC RAM ReadOut (corrupted data)
 - bugs correction in External ADC ReadOut (corrupted data)

Skiroc2_20110819 : (6)

 - Slow Clock 5MHz or 2,5MHz
 - Val_Evt gating available on IN_ALTERA2
 - OR64 polarity on OUT_ALTERA3
 - OR64 delayed to auto hold analogue backup SCA for External ADC readout
 - Improved ReadOut speed in ASIC RAM ReadOut

Skiroc2_20110928 : (7)

 - Improved S-curve measurement (using latched probe NOR64 instead of trig_outb)
 - Bug correction in External ADC ReadOut (reset issue)
 - Choice of clock speed for External ADC ReadOut (1.66MHz or 416kHz)
 - Coincidence feature added (using IN_ALTERA6 & OUT_ALTERA6)
 - AutoDAQ provide Synchro signal for external pulser (Start Acq on OUT_ALTERA5)

Skiroc2_20121125 : (8)

 - Correction on AutoDAQ

Skiroc2_20160601 : (9)

 - USB interface (Verilog) speed changed (20MHz instead of 10MHz)
 - SKIROC2-CMS management added
 - Delay for OR64 increased to 255 (auto hold) //  for SKIROC2/2A only
 - Data selection for Scurves (S-curves) //  for SKIROC2-CMS only
 - AutoDAQ timeout set to 26bits for SK2-CMS (keep 12bits for SK2/SK2A)
 - Stop Acquisition of SKIROC2-CMS on IN_ALTERA1
 - LVDS data (RAM readout) // for SK2-CMS only 
 - RazChn available on IN_ALTERA5
 - Fast Clock choice of SK2-CMS
 - RAM Readout speed (40MHz for SK2-CMS / 5MHz max for SK2/2A)
 - Slow Clock in SK2 / Fast Clock for SK2_CMS on CLK_GENE_EXT
 - CK_roll for SK2_CMS on IN_ALTERA6
 - AutoDAQ provide Synchro signal for external pulser (Strt on SYNC_GENE)

Skiroc2_20160628 : (10)

 - OR64_delayed set on TOA on SK2CMS (instead of TOT)
 - External ADC measurement changed for SK2-CMS (SCA0 LG&HG + TOA rising&falling + TOT slow&fast + Hit_TOA)
 - CK_roll for SK2_CMS on HOLD conn.

Skiroc2_20161014 : (11)

 - corrections as firmware v10 was not properly working with SKIROC2/SKIROC2A (RazChn)
 - 40MHz or 50MHz for fast Clock in SK2/SK2A
 - Scurve correction for SK2CMS [Scurve data send to pin test_30]
 - external ADC aquisition for SK2CMS corrected (unstable + memory size issue)
 - external ADC aquisition for SK2 improved (up to 8 acq/sequence)

Skiroc2_20161117 : (12)

 - minor correction for AutoDAQ sync with external pulser started by fw

Skiroc2_20170420 : (13)

 - minor correction for ValEvt in SK2CMS_AutoDAQ (correction of rising edge)

Skiroc2_20180423 : (14)

 - 5MHz ReadOut for data (SK2/2A only), even if using user clock [clock switching] with AutoDAQ
 - correction on external ADC acquisition for SK2 (bad end in v11) [now ready to acquire 8 acq]
