Archive Project report for Skiroc2
Mon Apr 30 16:01:13 2018
Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Archive Project Summary
  3. Archive Project Messages
  4. Files Archived



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2010 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------+
; Archive Project Summary                                        ;
+------------------------+---------------------------------------+
; Archive Project Status ; Successful - Mon Apr 30 16:01:13 2018 ;
; Revision Name          ; Skiroc2                               ;
; Top-level Entity Name  ; Skiroc2                               ;
; Family                 ; Cyclone                               ;
+------------------------+---------------------------------------+


+--------------------------+
; Archive Project Messages ;
+--------------------------+
Info: File Set 'Custom' contains:
    Info: Programming output files
    Info: Automatically detected source files
    Info: Project source and settings files
Info: ----------------------------------------------------------
Info: ----------------------------------------------------------
Info: Generated archive 'D:/synchro_portable/Data/ASIC/skiroc2/firmware/Skiroc2.qar'
Info: ----------------------------------------------------------
Info: ----------------------------------------------------------
Info: Generated report 'Skiroc2.archive.rpt'
Info: Evaluation of Tcl script c:/altera/91sp2/quartus/common/tcl/apps/qpm/qar.tcl was successful
Info: Quartus II Shell was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 166 megabytes
    Info: Processing ended: Mon Apr 30 16:01:13 2018
    Info: Elapsed time: 00:00:03
    Info: Total CPU time (on all processors): 00:00:02


+-------------------------------------------+
; Files Archived                            ;
+-------------------------------------------+
; File Name                                 ;
+-------------------------------------------+
; AutoDAQ_SK2_v1.vhd                        ;
; AutoDAQ_SK2CMS_v1a.vhd                    ;
; big_fifo.bsf                              ;
; big_fifo.cmp                              ;
; big_fifo.inc                              ;
; big_fifo.qip                              ;
; big_fifo.vhd                              ;
; big_fifo_inst.vhd                         ;
; ck_mux.bsf                                ;
; ck_mux.cmp                                ;
; ck_mux.inc                                ;
; ck_mux.qip                                ;
; ck_mux.vhd                                ;
; ck_mux_inst.vhd                           ;
; clk_div.bsf                               ;
; clk_div.cmp                               ;
; clk_div.inc                               ;
; clk_div.qip                               ;
; clk_div.vhd                               ;
; clk_div_inst.vhd                          ;
; count2bits.bsf                            ;
; count2bits.cmp                            ;
; count2bits.inc                            ;
; count2bits.qip                            ;
; count2bits.vhd                            ;
; count2bits_inst.vhd                       ;
; count4bits.bsf                            ;
; count4bits.cmp                            ;
; count4bits.inc                            ;
; count4bits.qip                            ;
; count4bits.vhd                            ;
; count4bits_inst.vhd                       ;
; count4timeout.bsf                         ;
; count4timeout.cmp                         ;
; count4timeout.inc                         ;
; count4timeout.qip                         ;
; count4timeout.vhd                         ;
; count4timeout_inst.vhd                    ;
; count16bits.bsf                           ;
; count16bits.cmp                           ;
; count16bits.inc                           ;
; count16bits.qip                           ;
; count16bits.vhd                           ;
; count16bits_inst.vhd                      ;
; count27bits.bsf                           ;
; count27bits.cmp                           ;
; count27bits.inc                           ;
; count27bits.qip                           ;
; count27bits.vhd                           ;
; count27bits_inst.vhd                      ;
; counter_10b.bsf                           ;
; counter_10b.cmp                           ;
; counter_10b.inc                           ;
; counter_10b.qip                           ;
; counter_10b.vhd                           ;
; counter_10b_inst.vhd                      ;
; data_count.bsf                            ;
; data_count.cmp                            ;
; data_count.inc                            ;
; data_count.qip                            ;
; data_count.vhd                            ;
; data_count_inst.vhd                       ;
; delay_mux.bsf                             ;
; delay_mux.cmp                             ;
; delay_mux.inc                             ;
; delay_mux.qip                             ;
; delay_mux.vhd                             ;
; delay_mux_inst.vhd                        ;
; delay_OR_trigger.bsf                      ;
; delay_OR_trigger.cmp                      ;
; delay_OR_trigger.inc                      ;
; delay_OR_trigger.qip                      ;
; delay_OR_trigger.vhd                      ;
; delay_OR_trigger_inst.vhd                 ;
; Enable_sync_clock.vhd                     ;
; External_ADC_SK2_v2.vhd                   ;
; External_ADC_SK2CMS.vhd                   ;
; fifo.bsf                                  ;
; fifo.cmp                                  ;
; fifo.inc                                  ;
; fifo.qip                                  ;
; fifo.vhd                                  ;
; fifo_acd_SK2CMS.bsf                       ;
; fifo_acd_SK2CMS.cmp                       ;
; fifo_acd_SK2CMS.inc                       ;
; fifo_acd_SK2CMS.qip                       ;
; fifo_acd_SK2CMS.vhd                       ;
; fifo_acd_SK2CMS_inst.vhd                  ;
; fifo_adc.bsf                              ;
; fifo_adc.cmp                              ;
; fifo_adc.inc                              ;
; fifo_adc.qip                              ;
; fifo_adc.vhd                              ;
; fifo_adc_inst.vhd                         ;
; fifo_inst.vhd                             ;
; Firmware_version.vhd                      ;
; flipflop.bsf                              ;
; flipflop.cmp                              ;
; flipflop.inc                              ;
; flipflop.qip                              ;
; flipflop.vhd                              ;
; flipflop_inst.vhd                         ;
; flipflopaclr.bsf                          ;
; flipflopaclr.cmp                          ;
; flipflopaclr.inc                          ;
; flipflopaclr.qip                          ;
; flipflopaclr.vhd                          ;
; flipflopaclr_en.bsf                       ;
; flipflopaclr_en.cmp                       ;
; flipflopaclr_en.inc                       ;
; flipflopaclr_en.qip                       ;
; flipflopaclr_en.vhd                       ;
; flipflopaclr_en_inst.vhd                  ;
; flipflopaclr_inst.vhd                     ;
; latch_8.vhd                               ;
; mux4_1.bsf                                ;
; mux4_1.cmp                                ;
; mux4_1.inc                                ;
; mux4_1.qip                                ;
; mux4_1.tdf                                ;
; pll_sk2.bsf                               ;
; pll_sk2.cmp                               ;
; pll_sk2.inc                               ;
; pll_sk2.ppf                               ;
; pll_sk2.qip                               ;
; pll_sk2.vhd                               ;
; pll_sk2_inst.vhd                          ;
; Read_TransmitData_SK2.vhd                 ;
; Read_Word.vhd                             ;
; reg_8bits.bsf                             ;
; reg_8bits.cmp                             ;
; reg_8bits.inc                             ;
; reg_8bits.qip                             ;
; reg_8bits.vhd                             ;
; reg_8bits_inst.vhd                        ;
; RSwithTimeOut.vhd                         ;
; Scurve_1input_16bits_SK2.vhd              ;
; shift8register.bsf                        ;
; shift8register.cmp                        ;
; shift8register.inc                        ;
; shift8register.qip                        ;
; shift8register.vhd                        ;
; shift8register_inst.vhd                   ;
; Skiroc2.bdf                               ;
; Skiroc2.dpf                               ;
; Skiroc2.pof                               ;
; Skiroc2.qpf                               ;
; Skiroc2.qsf                               ;
; Skiroc2.sdc                               ;
; Skiroc2.sof                               ;
; Skiroc2_assignment_defaults.qdf           ;
; SlowControl_SK2_ERO_v3.vhd                ;
; static_8bit_registers.vhd                 ;
; usb_fw_v23_verilog/interruptunit.v        ;
; usb_fw_v23_verilog/readrequnit.v          ;
; usb_fw_v23_verilog/rxunit.v               ;
; usb_fw_v23_verilog/txunit.v               ;
; usb_fw_v23_verilog/usb_full_interface_v.v ;
+-------------------------------------------+


