LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE ieee.numeric_std.all;
USE ieee.std_logic_unsigned.all;

ENTITY static_8bit_registers IS
	PORT (
			n_reset		: IN STD_LOGIC ;
			n_write		: IN STD_LOGIC ;
			n_read		: IN STD_LOGIC ;
			subadd		: IN STD_LOGIC_VECTOR (6 DOWNTO 0);
			user_data	: INOUT STD_LOGIC_VECTOR (7 DOWNTO 0);
			word_30		: INOUT	STD_LOGIC_VECTOR (7 DOWNTO 0);
			word_31		: INOUT	STD_LOGIC_VECTOR (7 DOWNTO 0);
			word_32		: INOUT	STD_LOGIC_VECTOR (7 DOWNTO 0);
			word_33		: INOUT	STD_LOGIC_VECTOR (7 DOWNTO 0);
			word_34		: INOUT	STD_LOGIC_VECTOR (7 DOWNTO 0);
			word_35		: INOUT	STD_LOGIC_VECTOR (7 DOWNTO 0);
			word_36		: INOUT	STD_LOGIC_VECTOR (7 DOWNTO 0);
			word_37		: INOUT	STD_LOGIC_VECTOR (7 DOWNTO 0)
		);
END static_8bit_registers;


ARCHITECTURE SYN OF static_8bit_registers IS

	SIGNAL sel_word		: Std_Logic_Vector (7 DOWNTO 0);

COMPONENT latch_8
	port(
			aclr	: IN STD_LOGIC ;
			n_write	: IN STD_LOGIC ;
			data	: IN STD_LOGIC_VECTOR (7 DOWNTO 0);
			sel_word: IN STD_LOGIC_VECTOR (7 DOWNTO 0);
			word0	: OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
			word1	: OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
			word2	: OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
			word3	: OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
			word4	: OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
			word5	: OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
			word6	: OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
			word7	: OUT STD_LOGIC_VECTOR (7 DOWNTO 0)
		);
END COMPONENT;

COMPONENT Read_Word
	PORT
	(
	reset		: IN	STD_LOGIC;
	n_read		: IN	STD_LOGIC;	-- horloge pour la sm et l'ADC
	selection	: IN	STD_LOGIC;	-- selection lecture 
	word_x		: IN	STD_LOGIC_VECTOR(7 DOWNTO 0); -- registre à lire
	User_Data	: INOUT	STD_LOGIC_VECTOR(7 DOWNTO 0) -- bus USB
	);
END	COMPONENT;

BEGIN
-- 8x8 bits Latch Instantiation    // Machine d'ecriture du bus USB vers Word 30 à 37
Ins0_7_Latch8 : latch_8 PORT MAP (
		aclr		=> NOT (n_reset),
		n_write		=> n_write,
		data		=> user_data,
		sel_word	=> sel_word,
		word0		=> word_30,
		word1		=> word_31,
		word2		=> word_32,
		word3		=> word_33,
		word4		=> word_34,
		word5		=> word_35,
		word6		=> word_36,
		word7		=> word_37
	);

-- USB Read instantiation        // Machine de lecture du Word 30 (ecriture sur bus USB)
Read_Word0 : Read_Word PORT MAP (
		reset		=> n_reset,
		n_read		=> n_read,
		selection	=> sel_word(0), 
		word_x		=> word_30,	-- registre à lire
		User_Data	=> user_data -- bus USB
	);

--								// Machine de lecture du Word 31 (ecriture sur bus USB)
Read_Word1 : Read_Word PORT MAP (
		reset		=> n_reset,
		n_read		=> n_read,
		selection	=> sel_word(1), 
		word_x		=> word_31,	-- registre à lire
		User_Data	=> user_data -- bus USB
	);

--								// Machine de lecture du Word 32 (ecriture sur bus USB)
Read_Word2 : Read_Word PORT MAP (
		reset		=> n_reset,
		n_read		=> n_read,
		selection	=> sel_word(2), 
		word_x		=> word_32,	-- registre à lire
		User_Data	=> user_data -- bus USB
	);

--								// Machine de lecture du Word 33 (ecriture sur bus USB)
Read_Word3 : Read_Word PORT MAP (
		reset		=> n_reset,
		n_read		=> n_read,
		selection	=> sel_word(3), 
		word_x		=> word_33,	-- registre à lire
		User_Data	=> user_data -- bus USB
	);

--								// Machine de lecture du Word 34 (ecriture sur bus USB)
Read_Word4 : Read_Word PORT MAP (
		reset		=> n_reset,
		n_read		=> n_read,
		selection	=> sel_word(4), 
		word_x		=> word_34,	-- registre à lire
		User_Data	=> user_data -- bus USB
	);

--								// Machine de lecture du Word 35 (ecriture sur bus USB)
Read_Word5 : Read_Word PORT MAP (
		reset		=> n_reset,
		n_read		=> n_read,
		selection	=> sel_word(5), 
		word_x		=> word_35,	-- registre à lire
		User_Data	=> user_data -- bus USB
	);

--								// Machine de lecture du Word 36 (ecriture sur bus USB)
Read_Word6 : Read_Word PORT MAP (
		reset		=> n_reset,
		n_read		=> n_read,
		selection	=> sel_word(6), 
		word_x		=> word_36,	-- registre à lire
		User_Data	=> user_data -- bus USB
	);

--								// Machine de lecture du Word 37 (ecriture sur bus USB)
Read_Word7 : Read_Word PORT MAP (
		reset		=> n_reset,
		n_read		=> n_read,
		selection	=> sel_word(7), 
		word_x		=> word_37,	-- registre à lire
		User_Data	=> user_data -- bus USB
	);



make_sel_word : PROCESS(subadd)
BEGIN
	CASE subadd IS
	WHEN "0011110"	=>	sel_word <= "00000001";	-- add(word_30) = 0
	WHEN "0011111"	=>	sel_word <= "00000010";	-- add(word_31) = 1
	WHEN "0100000"	=>	sel_word <= "00000100";	-- add(word_32) = 2
	WHEN "0100001"	=>	sel_word <= "00001000";	-- add(word_33) = 3
	WHEN "0100010"	=>	sel_word <= "00010000";	-- add(word_34) = 4
	WHEN "0100011"	=>	sel_word <= "00100000";	-- add(word_35) = 5
	WHEN "0100100"	=>	sel_word <= "01000000";	-- add(word_36) = 6
	WHEN "0100101"	=>	sel_word <= "10000000";	-- add(word_37) = 7
	WHEN OTHERS	=>	sel_word <= "00000000";
END CASE;
END PROCESS make_sel_word;

END SYN;
